In recent years, a non-volatile memory apparatus having a non-volatile memory such as a flash memory (for example, a memory card) are becoming to be used as a memory apparatus of a portable device that handles music data or visual data, which is rewritable, has a high portability, and does not need a backup protection by a battery or the like.
The conventional control method of a non-volatile memory apparatus will be described with reference to FIG. 1 through FIG. 4, FIG. 24 and FIG. 25. FIG. 1 is a block diagram showing the configuration of the non-volatile memory apparatus. In FIG. 1, a numeral 101 shows a non-volatile memory apparatus and a numeral 102 shows a host. The non-volatile memory apparatus 101 has a non-volatile memory 103, a controller 104, an erased table 105, and a logical address/physical address conversion table 106. The non-volatile memory 103 is a flash memory. The host 102 gives a command to the non-volatile memory apparatus 101 such as data writing and data reading, transmits the data to write on, and receives a readout data sent from the non-volatile memory apparatus 101. The controller 104 of the non-volatile memory apparatus 101 controls the data writing onto the non-volatile memory 103, or the data readout from the non-volatile memory 103, and the like, based on the command from the host 102.
A non-volatile memory 103 consists of a plurality of physical blocks. The configuration of the physical block will be described with reference to FIG. 24. FIG. 24 shows the configuration of a physical block of the non-volatile memory 103 in the conventional art. Physical block 501 consists of 32 pages. The capacity of a single page is 528 bytes, and a page is divided into a data area 502 of 512 bytes and a redundancy area 503 of 16 bytes. The data area 502 is the area to write data transmitted from the host 102. The redundancy area 503 is the area to write the ECC (error correcting code) code for data area 502 and management information such as a logical address corresponding to the physical block 501. A single page is a data writing unit and a data readout unit. When data is written, the data is written in order in a page unit from page 0 to page 31 of the physical block. Operation to write 1 onto the erased memory can be omitted. The physical block 501 is a data erasing unit, and all 32 pages contained in the physical block are erased simultaneously when the data is to be erased. All the bits of the data in the non-volatile memory 103 are 1 when it is in an erased status.
After the power of the non-volatile memory apparatus 101 is turned on, the controller 104 executes an initialization process in which the erased table 105 and the logical address/physical address conversion table 106 are generated on a RAM.
FIG. 2 shows the configuration of the erased table 105. The erased table 105 is a table indicating whether the physical block is erased (unwritten) or not, and a 1-bit data is corresponded to each physical block. In FIG. 2, the left column shows the physical address (an address of a physical block of the non-volatile memory 103 is referred to as “a physical address”), and the right column shows the data wherein 1 indicates “erased” and 0 indicates “not erased”. The physical address in the left column is stated for explanatory purpose, and are generally not written onto a RAM. Generally, a physical address is converted to a RAM address by a pre-determined conversion formula, and a bit which indicates whether the physical block is erased (unwritten) or not is written onto the RAM address.
For example, when data including a bit of value 0 is written onto the redundancy area 503 of the first page of the physical block of the physical address 0 in an initialization process (when not all bits of the redundancy area of the first page are 1), it will be judged as written, and 0 will be written as the data of the physical address 0. When a redundancy area 503 of the first page of the physical block of the physical address 1 are all data of 1, it will be judged as erased and 1 will be written as the data of the physical address 1. In this way, the erased table 105 is completed to the final physical address.
FIG. 3 shows the configuration of a logical address/physical address conversion table 106. In the non-volatile memory apparatus 101 using a non-volatile memory 103, the address designated by the host 102 (referred to as “a logical address”) and the address located within the non-volatile memory 103 (referred to as “a physical address”) are not generally same. When the addresses are made same, application will be burdened by the reason that the physical address in which a defect had occurred within the non-volatile memory cannot be used, that data rewriting takes time, and so forth. And, in a system where writing onto a specific address occurs frequently, an adverse consequence would occur in which the physical address exceeds its guaranteed rewriting number of times (the guaranteed rewriting number of times of a non-volatile memory is generally limited) in a short term and will be short-lived. The controller 104 of the non-volatile memory apparatus 101 converts the logical address designated by the host 102 to a physical address, and writes the logical address corresponding to its physical address onto the redundancy area 503 at the time of data recording of the physical block. Generally, the logical address is written onto the redundancy area 503 of the first page.
After the power of the non-volatile memory apparatus 101 is turned on, the controller 104 reads out the logical addresses written on the redundancy areas 503 of the physical blocks, and generates a logical address/physical address conversion table 106 on a RAM. For example, when data exists in the first page of a physical block of the physical address 0, and 2 is written as the logical address, 0 is written as the physical address corresponding to the logical address 2 in the logical address/physical address conversion table 106. When data exists in the first page of the physical block of the physical address 2, and 999 is written as the logical address, 2 is written as the physical address corresponding to the logical address 999 in the logical address/physical address conversion table 106. When a corresponding data of the logical address does not exist in the non-volatile memory, for example, when there is no physical block having 1 written as the logical address, value 1000 which indicates that data does not exist is written as the physical address corresponding to the logical address 1 in the logical address/physical address conversion table 106.
FIG. 4 is a flowchart of an initialization process of a conventional non-volatile memory apparatus 101. 0 (initial value) is set in the block counter (step 401). The controller 104 reads out the redundancy area 503 of the first page of the physical block which is the target for read out of a non-volatile memory 103 (step 402). The redundancy area 503 is judged whether it is erased or not (step 403). When the redundancy area 503 is data of all 1, it is judged as erased and when data including a bit of value 0 is written, it is judged as written. When the redundancy area 503 is erased, 1 is written onto its physical block column of the erased table 105 for registering the physical block as erased (step 404). When the redundancy area 503 is not erased, 0 (not erased) is written onto its physical block column of the erased table 105 (step 405). When the redundancy area 503 is not erased, the logical address written onto the redundancy area 503 is read out, and a physical address is registered in the place corresponding to its logical address of the logical address/physical address conversion table 106 (step 406). Whether it is a final physical block or not is judged (step 407). When it is not a final physical block, 1 is added to the block counter (step 408), returns to step 402 and the process is repeated. When it is a final physical block, initialization is completed.
Data rewriting method of a non-volatile memory 103 will be described. When the host 102 gives a command of data writing onto the non-volatile memory apparatus 101, the controller 104 writes the data transmitted from the host 102 onto the non-volatile memory 103. FIG. 25 is a flowchart of a data rewriting method of a non-volatile memory apparatus 101 in the conventional art. The controller 104 detects the erased physical block from the erased table 105, and secures it as a physical block of a writing destination (step 601). Data is written onto the secured physical block in a page unit (step 603). A physical block (old physical block) which includes invalid data (data which became unnecessary as a result from writing a new data) is erased (step 604). The old physical block can be erased then and there, or, by temporarily setting the flag indicating whether the data is valid or not to a value indicating invalid on the spot, erasing can be executed at another timing. The erased table 105 and the logical address/physical address conversion table 106 are updated (step 605). More specifically, 0 (written) is written onto a bit corresponding to the physical block in which writing was executed, in the erased table 105. After the old physical block (a physical block which includes invalid data) is erased, 1 (erased) is written onto the bit corresponding to the old physical block. The physical address corresponding to the logical address in the logical address/physical address conversion table 106 is updated to the new physical block, in which writing has been executed, from the old physical block.
When an abnormal condition such as a power shut down occurs during data writing in step 603, there is a possibility that the data of the physical block which was during writing becomes an incorrect data.
In the Official Gazette of Japanese Unexamined Patent Publication 2001-51883, a non-volatile memory apparatus of the conventional art 1 having a non-volatile memory equipped with a self-repairing function which would automatically restore after the next startup to the status before the writing, when a process is ended during writing due to abnormal condition of a power shut down and the like, is described. The non-volatile memory apparatus of the conventional art 1 has a during writing flag, an address buffer and a data buffer at the exterior of a memory. The during writing flag is put into a valid status during data writing, and the during writing flag is put into an invalid status at all other times. When the during writing flag is in a valid status at the startup, the content of the data buffer is written onto the memory area which is indicated by the address buffer. Furthermore, owing to this, the apparatus can be restored, at a startup, to the status before the abnormal writing.
In a non-volatile memory apparatus in the conventional art, when an abnormal condition such as a power shut down occurs during data writing to the first page of the physical block in step 603, there can be a situation in which data is partially written only onto the data area 502, and the redundancy area 503 is erased (unwritten). When initialization is executed under this situation, it would wrongly judge this physical block as erased, since the erased table 105 is generated based on the data of the redundancy area 503 of the first page.
When an abnormal condition such as a power shut down occurs during erasing of the old physical block in step 604, there can be a situation in which the first page of the old physical block is erased, and other pages are not erased. When initialization is executed under this situation, it would wrongly judge this old physical block as erased.
In a case where such physical block which is not erased is wrongly judged as erased, it would result to writing data onto a physical block which is wrongly judged as erased, when data writing occurs thereafter. Since non-volatile memory cannot overwrite data to a written physical data (writing 1 onto a bit of 0 in a page unit is not possible), there was a problem in which data cannot be written correctly and becomes an incorrect data.
There can also be a situation in which, due to interruption of writing or interruption of erasing, the redundancy area of the first page of the physical block is written, and other pages are not written. When initialization is executed under this situation, it would read out the logical address written onto the redundancy area of the first page, and register it in the logical address/physical address conversion table 106. It would wrongly judge the physical block during writing or erasing as a valid written physical block. It is likely that a management data of the non-volatile memory 103 is written onto the redundancy area 503 of the first page of the physical block, and when an incorrect table is generated in the initialization process, there is a possibility that it may become impossible to access the non-volatile memory 103.
In a non-volatile memory apparatus in the conventional art 1, there is a possibility that processing of the non-volatile memory apparatus may become slow, due to necessity to write the data onto a great number of buffer (during writing flag, address buffer (logical address buffer, old physical address buffer, new physical address buffer) and data buffer) every time before data writing.
It is an object of the present invention to provide a control method of a non-volatile memory apparatus which can operate data writing normally after the next startup even when a process is interrupted due to the occurrences of abnormal conditions such as power shut down during data writing or data erasing. Thereby, a control method of a non-volatile memory apparatus which can correctly access a non-volatile memory and has a high data reliability can be provided.